module GCRAM
(input clk, input we, input[12:0] addr, input[15:0] di, output reg [15:0] do);
- reg [15:0] mem [255:0];
+ reg [15:0] mem [4095:0];
- always @ (posedge clk)
+ always @ (negedge clk)
do <= #1 mem[addr];
- always @ (posedge clk)
+ always @ (negedge clk)
if (we)
mem[addr] <= #1 di;