X-Git-Url: http://git.ieval.ro/?a=blobdiff_plain;f=lib%2FApp%2FScheme79asm.pm;h=18a68c82401abb1270d051687f2a53ae25dca214;hb=8ff4c670a59a17d4bbfd852fdb9f4cbb871c21d8;hp=77a09f94d1898a8862a3e1f2544cefe49dd52176;hpb=9924aa7bca1bd04de3ab5db16e0204d8d2bf6541;p=app-scheme79asm.git diff --git a/lib/App/Scheme79asm.pm b/lib/App/Scheme79asm.pm index 77a09f9..18a68c8 100644 --- a/lib/App/Scheme79asm.pm +++ b/lib/App/Scheme79asm.pm @@ -8,7 +8,7 @@ use Data::Dumper qw/Dumper/; use Data::SExpression qw/consp scalarp/; use Scalar::Util qw/looks_like_number/; -our $VERSION = '0.001'; +our $VERSION = '0.003'; our %TYPES = ( LIST => 0, @@ -32,7 +32,7 @@ our %TYPES = ( CONS => 3, ATOM => 4, PROGN => 5, - MAKELIST => 6, + 'REVERSE-LIST' => 6, FUNCALL => 7, ); @@ -77,6 +77,7 @@ sub process { die "Type is not a number or symbol: $type\n" } + $addr += (1 << $self->{addr_bits}) if $addr < 0; die "Type too large: $type\n" unless $type < (1 << $self->{type_bits}); die "Addr too large: $addr\n" unless $addr < (1 << $self->{addr_bits}); my $result = ($type << $self->{addr_bits}) + $addr; @@ -115,14 +116,26 @@ sub new { $args{addr_bits} //= 8; $args{freeptr} //= 6; $args{memory} //= [0, 0, (1<<$args{addr_bits}), (1<<$args{addr_bits}), 0, 0, 0]; - $args{symbols}{NIL} = 0; - $args{symbols}{T} = 1; - $args{nsymbols} = 2; + $args{symbols}{T} = 2; + $args{nsymbols} = 3; $args{comment} = ['(cdr part of NIL)', '(car part of NIL)', '(cdr part of T)', '(car part of T)', '(free storage pointer)', '', '(result of computation)']; bless \%args, $class } -sub print { +sub print_binary16 { + my ($self, $fh) = @_; + $fh //= \*STDOUT; + + die "addr_bits + type_bits >= 16\n"if $self->{addr_bits} + $self->{type_bits} > 16; + + my $length = @{$self->{memory}}; + print $fh pack('n', $length); + for (@{$self->{memory}}) { + print $fh pack('n', $_) + } +} + +sub print_verilog { my ($self, $fh) = @_; $fh //= \*STDOUT; @@ -141,13 +154,20 @@ sub print { $index = sprintf $index_format, $index; say $fh "mem[$index] <= $val;$spaces // $comment" } + +} +sub parse_and_print_binary16 { + my ($self, $string, $fh) = @_; + $self->parse($string); + $self->finish; + $self->print_binary16($fh); } -sub parse_and_print { +sub parse_and_print_verilog { my ($self, $string, $fh) = @_; $self->parse($string); $self->finish; - $self->print($fh); + $self->print_verilog($fh); } 1; @@ -163,7 +183,7 @@ App::Scheme79asm - assemble sexp to Verilog ROM for SIMPLE processor use App::Scheme79asm; my $asm = App::Scheme79asm->new(type_bits => 3, addr_bits => 5); - $asm->parse_and_print('(number 70)'); + $asm->parse_and_print_verilog('(number 70)'); =head1 DESCRIPTION @@ -196,11 +216,143 @@ expression to be evaluated). In normal use a single S-expression will be supplied, representing an entire program. -The B method takes such a string and prints a block -of verilog code assigning the memory contents to an array named -C. +The C is either a number, a type, or a primitive. +The available types are: + +=over + +=item LIST + +=item SYMBOL (syn. NUMBER) + +=item VAR (syn. VARIABLE) + +=item CLOSURE + +=item PROC (syn. PROCEDURE) + +=item IF (syn. COND, CONDITIONAL) + +=item CALL + +=item QUOTE (syn. QUOTED) + +=back + +The available primitives are: + +=over + +=item MORE + +=item CAR + +=item CDR + +=item CONS + +=item ATOM + +=item PROGN + +=item REVERSE-LIST + +=item FUNCALL + +=back + +The following methods are available: + +=over + +=item App::Scheme79asm->B([key => value, key => value, ...]) + +Create a new assembler object. Takes a list of keys and values, here +are the possible keys: + +=over + +=item type_bits + +=item address_bits + +A word is made of a type and an address, with the type occupying the +most significant C (default 3) bits, and the address +occupying the least significant C (default 8) bits. +Therefore the word size is C (default 13). + +=item freeptr + +A pointer to the last used byte in memory (default 6). The program +will be laid out starting with location C. + +=item memory + +The initial contents of the memory. Note that locations 4, 5, 6 will +be overwritten, as will every location larger than the value of +C. + +=item comment + +The initial comments for memory entries. C<< $comment->[$i] >> is the +comment for C<< $memory->[$i] >>. + +=item symbols + +The initial symbol map, as a hashref from symbol name to the index of +that symbol. Defaults to C<< {T => 2} >>. + +=item nsymbols + +The number to give to the "next" symbol (default 3, because T is +defined to be 2). + +=back + +=item $asm->B(I<$string>) + +Parse a sequence of S-expressions and lay it out in memory. +Can be called multiple times to lay out multiple sequences of +S-expressions one after another. + +=item $asm->B(I<$sexp>) + +Given an already-parsed sexp (meaning a +L object), lay it out in memory. +Can be called multiple times to lay out multiple sequences of +S-expressions one after another. + +=item $asm->B + +Move the last pointer to position 5, and put the free pointer at +position 4. After all sequences of S-expressions have been given to +B, this method should be called. + +=item $asm->B([I<$fh>]) + +Print the length of the memory (as a big-endian 16-bit value), +followed by the memory contents as a sequence of big-endian 16-bit +values to the given filehandle (default STDOUT). Dies if +C is more than 16. + +Big-endian 16-bit values can be decoded with C. + +=item $asm->B([I<$fh>]) + +Print a block of Verilog code assigning the memory contents to an +array named C to the given filehandle (default STDOUT). + +=item $asm->B(I<$string>[, I<$fh>]) + +Convenience method that calls B($string), B, and then +B($fh). + +=item $asm->B(I<$string>[, I<$fh>]) + +Convenience method that calls B($string), B, and then +B($fh). -More documentation and features to follow. +=back =head1 SEE ALSO