X-Git-Url: http://git.ieval.ro/?a=blobdiff_plain;f=lisp_processor.v;h=f856aa2ada64a4652aec41c907272f7c6b6e7208;hb=6414d51ab9e11e25d84a235e6f6f269c22143a9e;hp=a3b1966d8bc7949336560eef04c53a7c639535eb;hpb=c6418cc5f2b700f908cc8f330664f38537690a14;p=clump.git

diff --git a/lisp_processor.v b/lisp_processor.v
index a3b1966..f856aa2 100644
--- a/lisp_processor.v
+++ b/lisp_processor.v
@@ -29,7 +29,7 @@
 `endif
 
 module cpu (input clk, output [4:0] led, output uart_tx, input uart_rx);
-   wire [12:0] P;
+   wire [12:0] freeptr;
    wire [15:0] E1;
    wire [15:0] E2;
    wire [3:0] gcop;
@@ -69,13 +69,13 @@ module cpu (input clk, output [4:0] led, output uart_tx, input uart_rx);
 
    GCRAM gcram (.clk(clk), .we(ram_we), .addr(ram_addr), .di(ram_di), .do(ram_do));
 
-   GC gc (.clk(clk), .rst(reset), .clk_enable(gc_clock_enable), .Ein(E1), .Eout(E2), .gcop(gcop), .ostate(gostate), .step_eval(step_eval), .conn_ea(conn_ea), .conn_et(conn_et), .ram_we(gc_ram_we), .ram_addr(gc_ram_addr), .ram_di(gc_ram_di), .ram_do(ram_do), .Pout(P));
+   GC gc (.clk(clk), .rst(reset), .clk_enable(gc_clock_enable), .Ein(E1), .Eout(E2), .gcop(gcop), .ostate(gostate), .step_eval(step_eval), .conn_ea(conn_ea), .conn_et(conn_et), .ram_we(gc_ram_we), .ram_addr(gc_ram_addr), .ram_di(gc_ram_di), .ram_do(ram_do), .freeptr(freeptr));
 
    EVAL eval (.clk(clk), .rst(reset), .clk_enable(eval_clock_enable), .Ein(E2), .Eout(E1), .gcop(gcop), .ostate(eostate), .conn_ea(conn_ea), .conn_et(conn_et), .eval_finished(eval_finished));
 
    READER reader (.clk(clk), .clk_enable(reader_clock_enable), .rx_byte(uart_rx_byte), .rx_signal(uart_rx_signal), .finished(reader_finished), .ram_we(reader_ram_we), .ram_addr(reader_ram_addr), .ram_di(reader_ram_di));
 
-   WRITER writer (.clk(clk), .clk_enable(writer_clock_enable), .tx_byte(uart_tx_byte), .tx_signal(uart_tx_signal), .tx_busy(uart_is_transmitting), .finished(writer_finished), .ram_addr(writer_ram_addr), .ram_do(ram_do), .P(P));
+   WRITER writer (.clk(clk), .clk_enable(writer_clock_enable), .tx_byte(uart_tx_byte), .tx_signal(uart_tx_signal), .tx_busy(uart_is_transmitting), .finished(writer_finished), .ram_addr(writer_ram_addr), .ram_do(ram_do), .freeptr(freeptr));
 
    // UART outputs
    wire       uart_rx_signal;