]> iEval git - clump.git/commitdiff
Get rid of flash.v
authorMarius Gavrilescu <marius@ieval.ro>
Wed, 14 Mar 2018 11:21:19 +0000 (13:21 +0200)
committerMarius Gavrilescu <marius@ieval.ro>
Wed, 14 Mar 2018 11:21:19 +0000 (13:21 +0200)
Makefile
flash.pcf [deleted file]
flash.txt [deleted file]
flash.v [deleted file]
lisp_processor.pcf [new file with mode: 0644]
lisp_processor.v

index 7d80540cdc632d0d3582b21cb7f2b94fe80fcdea..df0855a93bc98b0a7a906b34742d26c8e3d39b4b 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,11 +1,11 @@
-PROJ = flash
-PIN_DEF = flash.pcf
+PROJ = lisp_processor
+PIN_DEF = lisp_processor.pcf
 DEVICE = hx1k
 
 all: $(PROJ).rpt $(PROJ).bin
 
 %.blif: %.v
-       tools/yosys/yosys -p 'synth_ice40 -top top -blif $@' $<
+       tools/yosys/yosys -p 'synth_ice40 -top cpu -blif $@' $<
 
 %.asc: $(PIN_DEF) %.blif
        tools/arachne-pnr/bin/arachne-pnr -d $(subst hx,,$(subst lp,,$(DEVICE))) -o $@ -p $^ -P tq144
diff --git a/flash.pcf b/flash.pcf
deleted file mode 100644 (file)
index 6ceab94..0000000
--- a/flash.pcf
+++ /dev/null
@@ -1,67 +0,0 @@
-# Generic iCEstick placement constraints file
-
-# Red LEDs
-set_io LED[0] 99
-set_io LED[1] 98
-set_io LED[2] 97
-set_io LED[3] 96
-
-# Green LED
-set_io LED[4] 95
-
-# IrDA port
-#set_io RXD 106
-#set_io TXD 105
-#set_io SD 107
-
-# Pmod connector
-#set_io PIO1_02 78 # Pin 1
-#set_io PIO1_03 79 # Pin 2
-#set_io PIO1_04 80 # Pin 3
-#set_io PIO1_05 81 # Pin 4
-#set_io PIO1_06 87 # Pin 7
-#set_io PIO1_07 88 # Pin 8
-#set_io PIO1_08 90 # Pin 9
-#set_io PIO1_09 91 # Pin 10
-
-# Connector J1
-#set_io PIO0_02 112 # Pin 3
-#set_io PIO0_03 113 # Pin 4
-#set_io PIO0_04 114 # Pin 5
-#set_io PIO0_05 115 # Pin 6
-#set_io PIO0_06 116 # Pin 7
-#set_io PIO0_07 117 # Pin 8
-#set_io PIO0_08 118 # Pin 9
-#set_io PIO0_09 119 # Pin 10
-
-# Connector J3
-#set_io PIO2_17 62 # Pin 3
-#set_io PIO2_16 61 # Pin 4
-#set_io PIO2_15 60 # Pin 5
-#set_io PIO2_14 56 # Pin 6
-#set_io PIO2_13 48 # Pin 7
-#set_io PIO2_12 47 # Pin 8
-#set_io PIO2_11 45 # Pin 9
-#set_io PIO2_10 44 # Pin 10
-
-# FTDI Port B UART
-#set_io DCDn 1
-#set_io DSRn 2
-#set_io DTRn 3
-#set_io CTSn 4
-#set_io RTSn 7
-set_io UART_TX 8
-set_io UART_RX 9
-
-# SPI
-#set_io SPI_SCK 70
-#set_io SPI_SI 68
-#set_io SPI_SO 67
-#set_io SPI_SS_B 71
-
-# Configuration pins
-#set_io CDONE 65
-#set_io CRESET_B 66
-
-# 12 MHz clock
-set_io CLK 21
diff --git a/flash.txt b/flash.txt
deleted file mode 100644 (file)
index 9d1272a..0000000
--- a/flash.txt
+++ /dev/null
@@ -1,4224 +0,0 @@
-.comment arachne-pnr 0.1+154+0 (git sha1 6b83364, g++ 4.8.4-2ubuntu1~14.04.1 -O2)
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diff --git a/flash.v b/flash.v
deleted file mode 100644 (file)
index eacbce0..0000000
--- a/flash.v
+++ /dev/null
@@ -1,22 +0,0 @@
-`include "lisp_processor.v"
-
-`ifdef SIM
-`define SCALING 0
-`else
-`define SCALING 7
-`endif
-
-module top (input CLK, output [4:0] LED, output UART_TX, input UART_RX);
-   // Prescaler on the clock
-   reg [24:0]  counter = 0;
-
-   always @ (posedge CLK) begin
-      counter <= counter + 1;
-   end
-
-   // Connect up the processor
-   PROCESSOR cpu(.clk(CLK),
-                                .led(LED),
-                                .uart_tx(UART_TX),
-                                .uart_rx(UART_RX));
-endmodule
diff --git a/lisp_processor.pcf b/lisp_processor.pcf
new file mode 100644 (file)
index 0000000..92d1b64
--- /dev/null
@@ -0,0 +1,20 @@
+# Red LEDs
+set_io led[0] 99
+set_io led[1] 98
+set_io led[2] 97
+set_io led[3] 96
+
+# Green LED
+set_io led[4] 95
+
+# FTDI Port B UART
+#set_io DCDn 1
+#set_io DSRn 2
+#set_io DTRn 3
+#set_io CTSn 4
+#set_io RTSn 7
+set_io uart_tx 8
+set_io uart_rx 9
+
+# 12 MHz clock
+set_io clk 21
index 910b1735c4ca6ad818aa1499705b50287d2f774c..bb5107f30106d4c6403062d27bfffe2418605145 100644 (file)
@@ -1,12 +1,6 @@
-`include "asciihex.v"
-`include "generic_fifo_sc_a.v"
 `include "gc.v"
 `include "eval.v"
-`include "ram.v"
 `include "reader.v"
-`include "rom.v"
-`include "prescaler.v"
-`include "single_trigger.v"
 `include "uart.v"
 `include "writer.v"
 
@@ -33,7 +27,7 @@
  `define UART_DIVIDE 625
 `endif
 
-module PROCESSOR (input clk, output [4:0] led, output uart_tx, input uart_rx);
+module cpu (input clk, output [4:0] led, output uart_tx, input uart_rx);
    wire [15:0] result;
 
    reg [5:0]   initial_reset = 30;
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