-module GC (input clk, input mclk, input [7:0] Ein, output [7:0] Eout, input [3:0] gcop, output [5:0] ostate, output step_eval);
- reg [5:0] gostate = 6'o2;
- reg [5:0] gnstate;
+`include "gcram.v"
+
+module GC (input clk, input mclk, input [7:0] Ein, output [7:0] Eout, input [3:0] gcop, output [5:0] ostate, output conn_et, output conn_ea, output step_eval, output [7:0] result);
reg [15:0] rom_output;
- reg [7:0] Ein_latched;
+ reg [5:0] gostate = 6'o0;
+ reg [5:0] gnstate;
+ reg [7:0] Ein_latched = 6'h44; // initial value of E
always @(posedge clk) begin
Ein_latched <= Ein;
wire ldQ = rom_output[5];
wire ldP = rom_output[4];
wire conn_i = rom_output[3];
- wire conn_et = rom_output[2];
- wire conn_ea = rom_output[1];
+ assign conn_et = rom_output[2];
+ assign conn_ea = rom_output[1];
assign step_eval = rom_output[0];
wire ga_zero = ~|G[7:5];
6'o07: begin rom_output <= 16'o002020; gnstate <= 6'o10; end
6'o10: begin rom_output <= 16'o001200; gnstate <= 6'o11; end
6'o11: begin rom_output <= 16'o004020; gnstate <= 6'o12; end
- 6'o12: begin rom_output <= 16'o002100; gnstate <= 6'o13; end
+ 6'o12: begin rom_output <= 16'o002100 | (1 << 12); gnstate <= 6'o13; end
6'o13: begin rom_output <= 16'o000057; gnstate <= 6'o02; end
6'o14: begin rom_output <= 16'o004020; gnstate <= 6'o04; end
6'o15: begin rom_output <= 16'o000246; gnstate <= 6'o16; end
6'o57: begin rom_output <= 16'o004007; gnstate <= 6'o02; end
default: begin rom_output <= 16'o040000; gnstate <= 6'o20; end
endcase; // case (gostate)
- end // always @ (posedge mclk)
+ end // always @ *
always @ (posedge clk) begin
gostate <=
- /* ga_zero_disp ? (gnstate | ga_zero) : */
+ ga_zero_disp ? (gnstate | ga_zero) :
gcop_disp ? (gnstate | gcop) :
gnstate;
end // always @ (posedge clk)
assign ostate = gostate;
- reg [4:0] P = 5'b0; // free storage pointer begins at 0
+ reg [4:0] P;
reg [7:0] Q;
reg [7:0] R;
reg [7:0] S;
wire [7:0] I;
wire [7:0] G;
+ wire [7:0] Gout;
/*
assign G = rdR ? R : 8'bzzzzzzzz;
wire [7:0] GfromE = {GTfromE, GAfromE};
assign G = GfromR | GfromQ | GfromP | GfromP_plus | GfromI | GfromE;
+ assign Gout = GfromR | GfromQ | GfromP | GfromP_plus | GfromI;
+
+ assign Eout[4:0] = conn_ea ? Gout[4:0] : 0;
+ assign Eout[7:5] = conn_et ? Gout[7:5] : 0;
- assign Eout[4:0] = conn_ea ? G[4:0] : 0;
- assign Eout[7:5] = conn_et ? G[7:5] : 0;
-
- generic_dpram #(.aw(5), .dw(8)) RAM
- ( .rclk(mclk),
- .wclk(mclk),
- .rrst(1'b0),
- .wrst(1'b0),
- .rce(1'b1),
- .wce(1'b1),
-
- .oe(1'b1),
- .we(write),
- .raddr(A),
- .waddr(A),
- .do(I),
- .di(S));
+ GCRAM gcram (.clk(mclk), .we(write), .addr(A), .do(I), .di(S), .result(result));
always @ (posedge clk) begin
if (ldS) S = G;