`include "gcram.v"
-module GC (input clk, input clk_enable, input rst, input [15:0] Ein, output [15:0] Eout, input [3:0] gcop, output [5:0] ostate, output conn_et, output conn_ea, output step_eval, output ram_we, output [12:0] ram_addr, output [15:0] ram_di, input [15:0] ram_do, output [12:0] freeptr);
+module GC (input clk, input clk_enable, input [15:0] Ein, output [15:0] Eout, input [3:0] gcop, output [5:0] ostate, output conn_et, output conn_ea, output step_eval, output ram_we, output [12:0] ram_addr, output [15:0] ram_di, input [15:0] ram_do, output [12:0] freeptr);
reg [15:0] rom_output;
reg [5:0] gostate;
reg [5:0] gnstate;
end // always @ *
always @ (posedge clk) begin
- if(rst)
- gostate <= 0;
if(clk_enable)
gostate <=
ga_zero_disp ? (gnstate | ga_zero) :
gcop_disp ? (gnstate | gcop) :
gnstate;
+ else
+ gostate <= 0;
end // always @ (posedge clk)
assign ostate = gostate;