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Discover the PLL and multiply the CLK by 4
[clump.git]
/
lisp_processor.pcf
diff --git
a/lisp_processor.pcf
b/lisp_processor.pcf
index 92d1b64714f5338fed9f9ee363951c7f7f239256..9c2028709bb06ce6ee3cb5c9ed5f35cb3c55f866 100644
(file)
--- a/
lisp_processor.pcf
+++ b/
lisp_processor.pcf
@@
-17,4
+17,4
@@
set_io uart_tx 8
set_io uart_rx 9
# 12 MHz clock
-set_io
clk
21
+set_io
CLKin
21
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