loading a register or storing a value in memory. In contrast, a Lisp
machine processor reads an expression from memory, determines its
type, and recursively evaluates it. This operation lends itself to
-declarative programming, where the programmer declares an arbitrarly
+declarative programming, where the programmer declares an arbitrarily
complicated expression and asks the computer to evaluate it.
Another common feature of Lisp machine processors is the use of tagged
\end{itemize}
The REPL is therefore the entry point of YULE as a whole. An end-user
-who does not intend to extend YULE can plug in an iCEstick with the
-processor, and run the REPL. Then the user can write expressions in
-the REPL and get their values back. Besides being the entry point, the
-REPL serves as a convenient way to test that the entire system is
-working. An expression typed in the REPL goes through the compiler and
-assembler, and then is sent to the processor. It goes through the
-three stages of the processor (reading the expression into memory,
-evaluating the contents of the memory, writing a memory dump).
+who does not intend to extend YULE can plug in a USB device containing
+the YULE processor, and run the REPL. Then the user can write
+expressions in the REPL and get their values back. Besides being the
+entry point, the REPL serves as a convenient way to test that the
+entire system is working. An expression typed in the REPL goes through
+the compiler and assembler, and then is sent to the processor. It goes
+through the three stages of the processor (reading the expression into
+memory, evaluating the contents of the memory, writing a memory dump).
The hardware and software components of YULE have been tested to
ensure they function correctly. There is an automated test suite
and prints the result for the user to see.
\end{itemize}
-\clearpage
\section{Hardware}
The hardware part is built from 8 modules:
is enabled if and only if the GC clock is enabled and the GC's
\texttt{step\_eval} output is high.
-\clearpage
\subsection{GC}
\begin{figure}
\centering\includegraphics[height=4.88cm]{gc.eps}
This module represents one half of the original design presented in
\cite{lambda}, and the ROM's contents are those from the paper with a
-bugfi (the original design sets the ADR line low in two states when it
+bug (the original design sets the ADR line low in two states when it
should be high).
\subsection{EVAL}
paper except that the ROM is widened by one bit to indicate whether
the EVAL is finished evaluating the expression.
-\clearpage
\subsection{Writer}
\begin{figure}
\centering\includegraphics[height=2.26cm]{writer.eps}
This module is not part of the original design in \cite{lambda}, as
that paper did not concern itself with input and output.
-\clearpage
\subsection{Reader}
\begin{figure}
\centering\includegraphics[height=2.22cm]{reader.eps}
This module is not part of the original design in \cite{lambda}, as
that paper did not concern itself with input and output.
-\clearpage
\subsection{Putting the hardware together}
The components described above are managed by the controller, which
provides them with clock enable signals. The controller is a state
In STATE\_READ and STATE\_WRITE, the EVAL's reset line is high.
-Whenver the component corresponding to the current state indicates it
+Whenever the component corresponding to the current state indicates it
is finished, the controller advances to the next state.
The controller also includes three multiplexers that control which
((lambda append (x y) (if x (cons (car x) (append (cdr x) y)) y)) '(a b c) '(d e f))
\end{lstlisting}
-which is compiled to the sligthly shorter sexp:
+which is compiled to the slightly shorter sexp:
\begin{lstlisting}
(CALL (MORE (MORE (FUNCALL 0) (PROC (IF (LIST (VAR -2) (CALL (MORE (CONS 0) (CALL (MORE (MORE (FUNCALL 0) (VAR -1)) (VAR -2)) (CALL (CDR 0) (VAR -3)))) (CALL (CAR 0) (VAR -3)))) (VAR -3)))) (LIST (LIST (LIST (LIST 0) (SYMBOL 6)) (SYMBOL 7)) (SYMBOL 8))) (LIST (LIST (LIST (LIST 0) (SYMBOL 3)) (SYMBOL 4)) (SYMBOL 5)))
\texttt{00 07}, which is a list with car \texttt{00 00} and cdr
\texttt{20 02}, and the pretty printer prints \texttt{(nil . t)}.
-\clearpage
An example REPL session is:
\begin{lstlisting}
8 words are words 9th through 16th in the assembler output. The
following words are intermediate results computed by the processor.
-\item The REPL's pretty printer interpets this string starting with
+\item The REPL's pretty printer interprets this string starting with
\texttt{2005}, which means \texttt{(SYMBOL 5)}. The pretty printer
looks in the compiler's mapping and finds that the 5th symbol was
- 3, and so the REPL prints
+ 2, and so the REPL prints
\begin{lstlisting}
-3
+2
*
\end{lstlisting}
user can input another expression.
\end{enumerate}
+\begin{figure}
+ \centering\includegraphics[height=7cm]{repl.png}
+ \caption{What the user types and sees in this example}
+\end{figure}
+
\chapter{Conclusions}
A Lisp machine processor has been built using the original design and
techniques presented in \cite{lambda}. It has been extended with input
The original paper \cite{lambda} is one of the influential Lambda
Papers that defined the Scheme programming language and is an
-important historical artifact for understading how Lisp machine
+important historical artifact for understanding how Lisp machine
processors can be implemented and more generally how tagged
architectures work. But all details of the processor cannot be
understood from simply reading the paper, and most readers would not
projects / clump.git / blobdiff