Writer now works fine

[clump.git] / writer.v

diff --git a/writer.v b/writer.v
index 37f6e0a3fba1da519db22d74cf78830c69aa9eac..c68a8af35ed7e9f930b4739ef354c1a454535b1e 100644 (file)
--- a/writer.v
+++ b/writer.v
@@ -11,7 +11,7 @@ module WRITER (input clk, input clk_enable, output reg [7:0] uart_tx_byte, outpu
 
    assign ram_addr = current_index;
 
-   always @ (posedge clk)
+   always @ (posedge clk) begin
         if (clk_enable) begin
                if(uart_tx_signal)
                  uart_tx_signal <= 0;
@@ -50,5 +50,8 @@ module WRITER (input clk, input clk_enable, output reg [7:0] uart_tx_byte, outpu
                         end
                  end
                endcase // case (state)
-        end
+        end // if (clk_enable)
+        else
+          finished <= 0;
+   end
 endmodule