[yule.git] / flash.v

`include "lisp_processor.v"

module top (input CLK, output [4:0] LED, output UART_TX, input UART_RX);
   // Prescaler on the clock
   reg [24:0]  counter = 0;

   always @ (posedge CLK) begin
      counter <= counter + 1;
   end

   // Connect up the processor
   PROCESSOR cpu(.clk(counter[7]),
				 .led(LED),
				 .uart_tx(UART_TX),
				 .uart_rx(UART_RX));
endmodule
Commit	Line	Data
2ed306f8	1	`include "lisp_processor.v"
a051754e	2
9e30ab0c MG	3	module top (input CLK, output [4:0] LED, output UART_TX, input UART_RX);
	4	// Prescaler on the clock
	5	reg [24:0] counter = 0;
a051754e	6
9e30ab0c MG	7	always @ (posedge CLK) begin
9e30ab0c MG	8	counter <= counter + 1;
a051754e MG	9	end
a051754e MG	10
9e30ab0c	11	// Connect up the processor
2ed306f8	12	PROCESSOR cpu(.clk(counter[7]),
9e30ab0c MG	13	.led(LED),
	14	.uart_tx(UART_TX),
	15	.uart_rx(UART_RX));
	16	endmodule