Commit | Line | Data |
---|---|---|
2ed306f8 | 1 | `include "lisp_processor.v" |
a051754e | 2 | |
ab3ea03d MG |
3 | `ifdef SIM |
4 | `define SCALING 0 | |
5 | `else | |
6 | `define SCALING 7 | |
7 | `endif | |
8 | ||
9e30ab0c MG |
9 | module top (input CLK, output [4:0] LED, output UART_TX, input UART_RX); |
10 | // Prescaler on the clock | |
11 | reg [24:0] counter = 0; | |
a051754e | 12 | |
9e30ab0c MG |
13 | always @ (posedge CLK) begin |
14 | counter <= counter + 1; | |
a051754e MG |
15 | end |
16 | ||
9e30ab0c | 17 | // Connect up the processor |
eb54e6d0 | 18 | PROCESSOR cpu(.clk(CLK), |
9e30ab0c MG |
19 | .led(LED), |
20 | .uart_tx(UART_TX), | |
21 | .uart_rx(UART_RX)); | |
22 | endmodule |