gcram.v

   1 module GCRAM
   2 (input clk, input we, input[12:0] addr, input[15:0] di, output reg [15:0] do, output reg [15:0] result);
   3    reg [15:0] mem [255:0];
   4
   5    always @ (posedge clk)
   6          do <= #1 mem[addr];
   7
   8    always @ (posedge clk)
   9          if (we)
  10            mem[addr] <= #1 di;
  11
  12    always @ (posedge clk)
  13          result <= mem[6];
  14
  15    initial begin
  16           mem[0] <= 0;
  17           mem[1] <= 0;
  18           mem[2] <= 16'b0010000000000000;
  19           mem[3] <= 16'b0010000000000000;
  20           mem[4] <= 16'd8;
  21           mem[5] <= 16'b1110000000001000; /* QUOTE 8 */
  22           mem[6] <= 0;
  23           mem[7] <= 16'd48;
  24           mem[8] <= 16'd49;
  25           mem[9] <= 16'd50;
  26    end
  27 endmodule