Initial commit
[clump.git] / prescaler.v
1 // Prescalar with default 16 bit division
2
3 module PRESCALER #(parameter BITS = 16) (input clk, output out);
4
5 reg [BITS-1:0] counter = 0;
6
7 always @ (posedge clk) begin
8
9 counter <= counter + 1;
10
11 end
12
13 assign out = counter[BITS-1];
14
15 endmodule
This page took 0.022679 seconds and 5 git commands to generate.